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https://github.com/wessel-novacustom/clevo-keyboard.git
synced 2024-11-15 03:34:01 +01:00
Add retries for ex write and move enable custom fan table to end because of possible external race condition
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a8b3cb6dc3
commit
19642a2496
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@ -189,8 +189,8 @@ static bool fans_initialized = false;
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static int uw_init_fan(void) {
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int i;
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u16 addr_use_custom_fan_table_0 = 0x07c5;
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u16 addr_use_custom_fan_table_1 = 0x07c6;
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u16 addr_use_custom_fan_table_0 = 0x07c5; // use different tables for both fans (0x0f00-0x0f2f and 0x0f30-0x0f5f respectivly)
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u16 addr_use_custom_fan_table_1 = 0x07c6; // enable 0x0fxx fantables
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u8 offset_use_custom_fan_table_0 = 7;
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u8 offset_use_custom_fan_table_1 = 2;
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u8 value_use_custom_fan_table_0;
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@ -206,28 +206,28 @@ static int uw_init_fan(void) {
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set_full_fan_mode(false);
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uniwill_read_ec_ram(addr_use_custom_fan_table_0, &value_use_custom_fan_table_0);
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uniwill_read_ec_ram(addr_use_custom_fan_table_1, &value_use_custom_fan_table_1);
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if (!((value_use_custom_fan_table_0 >> offset_use_custom_fan_table_0) & 1)) {
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uniwill_write_ec_ram(addr_use_custom_fan_table_0, value_use_custom_fan_table_0 + (1 << offset_use_custom_fan_table_0));
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}
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if (!((value_use_custom_fan_table_1 >> offset_use_custom_fan_table_1) & 1)) {
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uniwill_write_ec_ram(addr_use_custom_fan_table_1, value_use_custom_fan_table_1 + (1 << offset_use_custom_fan_table_1));
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uniwill_write_ec_ram_with_retry(addr_use_custom_fan_table_0, value_use_custom_fan_table_0 + (1 << offset_use_custom_fan_table_0), 3);
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}
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uniwill_write_ec_ram(addr_cpu_custom_fan_table_end_temp, 0xff);
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uniwill_write_ec_ram(addr_cpu_custom_fan_table_start_temp, 0x00);
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uniwill_write_ec_ram(addr_cpu_custom_fan_table_fan_speed, 0x00);
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uniwill_write_ec_ram(addr_gpu_custom_fan_table_end_temp, 0xff);
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uniwill_write_ec_ram(addr_gpu_custom_fan_table_start_temp, 0x00);
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uniwill_write_ec_ram(addr_gpu_custom_fan_table_fan_speed, 0x00);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_end_temp, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_start_temp, 0x00, 3);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_fan_speed, 0x00, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_end_temp, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_start_temp, 0x00, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_fan_speed, 0x00, 3);
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for (i = 0x1; i <= 0xf; ++i) {
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uniwill_write_ec_ram(addr_cpu_custom_fan_table_end_temp + i, 0xff);
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uniwill_write_ec_ram(addr_cpu_custom_fan_table_start_temp + i, 0xff);
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uniwill_write_ec_ram(addr_cpu_custom_fan_table_fan_speed + i, 0x00);
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uniwill_write_ec_ram(addr_gpu_custom_fan_table_end_temp + i, 0xff);
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uniwill_write_ec_ram(addr_gpu_custom_fan_table_start_temp + i, 0xff);
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uniwill_write_ec_ram(addr_gpu_custom_fan_table_fan_speed + i, 0x00);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_end_temp + i, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_start_temp + i, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_fan_speed + i, 0x00, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_end_temp + i, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_start_temp + i, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_fan_speed + i, 0x00, 3);
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}
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uniwill_read_ec_ram(addr_use_custom_fan_table_1, &value_use_custom_fan_table_1);
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if (!((value_use_custom_fan_table_1 >> offset_use_custom_fan_table_1) & 1)) {
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uniwill_write_ec_ram_with_retry(addr_use_custom_fan_table_1, value_use_custom_fan_table_1 + (1 << offset_use_custom_fan_table_1), 3);
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}
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}
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@ -292,10 +292,15 @@ static u32 uw_set_fan(u32 fan_index, u8 fan_speed)
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static u32 uw_set_fan_auto(void)
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{
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u8 mode_data;
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// Get current mode
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uniwill_read_ec_ram(0x0751, &mode_data);
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// Switch off "full fan mode" (i.e. unset 0x40 bit)
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uniwill_write_ec_ram(0x0751, mode_data & 0xbf);
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if (has_universal_ec_fan_control() == 1) {
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}
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else {
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// Get current mode
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uniwill_read_ec_ram(0x0751, &mode_data);
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// Switch off "full fan mode" (i.e. unset 0x40 bit)
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uniwill_write_ec_ram(0x0751, mode_data & 0xbf);
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}
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return 0;
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}
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@ -37,6 +37,7 @@
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typedef u32 (uniwill_read_ec_ram_t)(u16, u8*);
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typedef u32 (uniwill_write_ec_ram_t)(u16, u8);
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typedef u32 (uniwill_write_ec_ram_with_retry_t)(u16, u8, int);
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typedef void (uniwill_event_callb_t)(u32);
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struct uniwill_interface_t {
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@ -50,6 +51,7 @@ u32 uniwill_add_interface(struct uniwill_interface_t *new_interface);
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u32 uniwill_remove_interface(struct uniwill_interface_t *interface);
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uniwill_read_ec_ram_t uniwill_read_ec_ram;
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uniwill_write_ec_ram_t uniwill_write_ec_ram;
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uniwill_write_ec_ram_with_retry_t uniwill_write_ec_ram_with_retry;
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u32 uniwill_get_active_interface_id(char **id_str);
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union uw_ec_read_return {
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@ -124,6 +124,32 @@ u32 uniwill_write_ec_ram(u16 address, u8 data)
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}
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EXPORT_SYMBOL(uniwill_write_ec_ram);
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u32 uniwill_write_ec_ram_with_retry(u16 address, u8 data, int retries)
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{
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u32 status;
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int i;
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u8 control_data;
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for (i = 0; i < retries; ++i) {
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status = uniwill_write_ec_ram(address, data);
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if (status != 0) {
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msleep(50);
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continue;
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}
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else {
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status = uniwill_read_ec_ram(address, &control_data);
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if (status != 0 || data != control_data) {
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msleep(50);
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continue;
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}
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break;
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}
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}
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return status;
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}
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EXPORT_SYMBOL(uniwill_write_ec_ram_with_retry);
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static DEFINE_MUTEX(uniwill_interface_modification_lock);
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u32 uniwill_add_interface(struct uniwill_interface_t *interface)
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