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uniwill_wmi: Tweak busy wait delay
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@ -36,7 +36,8 @@
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#define UNIWILL_EC_BIT_CFLG 3
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#define UNIWILL_EC_BIT_DRDY 7
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#define UW_EC_WAIT_CYCLES 0x50
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#define UW_EC_BUSY_WAIT_CYCLES 30
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#define UW_EC_BUSY_WAIT_DELAY 15
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static bool uniwill_ec_direct = true;
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@ -146,10 +147,10 @@ static u32 uw_ec_read_addr_direct(u8 addr_low, u8 addr_high, union uw_ec_read_re
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ec_write(UNIWILL_EC_REG_FLAGS, flags);
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// Wait for ready flag
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count = UW_EC_WAIT_CYCLES;
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count = UW_EC_BUSY_WAIT_CYCLES;
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ready = false;
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while (!ready && count != 0) {
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msleep(1);
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msleep(UW_EC_BUSY_WAIT_DELAY);
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ec_read(UNIWILL_EC_REG_FLAGS, &tmp);
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ready = (tmp & (1 << UNIWILL_EC_BIT_DRDY)) != 0;
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count -= 1;
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@ -204,10 +205,10 @@ static u32 uw_ec_write_addr_direct(u8 addr_low, u8 addr_high, u8 data_low, u8 da
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ec_write(UNIWILL_EC_REG_FLAGS, flags);
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// Wait for ready flag
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count = UW_EC_WAIT_CYCLES;
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count = UW_EC_BUSY_WAIT_CYCLES;
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ready = false;
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while (!ready && count != 0) {
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msleep(1);
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msleep(UW_EC_BUSY_WAIT_DELAY);
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ec_read(UNIWILL_EC_REG_FLAGS, &tmp);
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ready = (tmp & (1 << UNIWILL_EC_BIT_DRDY)) != 0;
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count -= 1;
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