mirror of
https://github.com/wessel-novacustom/clevo-keyboard.git
synced 2024-11-15 03:34:01 +01:00
Merge with already merged new fan control additions
This commit is contained in:
Christoffer Sandberg
commit
824f334a0e
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@ -34,7 +34,7 @@
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MODULE_DESCRIPTION("Hardware interface for TUXEDO laptops");
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MODULE_AUTHOR("TUXEDO Computers GmbH <tux@tuxedocomputers.com>");
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MODULE_VERSION("0.2.4");
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MODULE_VERSION("0.2.6");
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MODULE_LICENSE("GPL");
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MODULE_ALIAS_CLEVO_INTERFACES();
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@ -259,6 +259,86 @@ static long clevo_ioctl_interface(struct file *file, unsigned int cmd, unsigned
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return 0;
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}
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static int has_universal_ec_fan_control(void) {
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int ret;
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u8 data;
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ret = uniwill_read_ec_ram(0x078e, &data);
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if (ret < 0) {
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return ret;
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}
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return (data >> 6) & 1;
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}
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static int set_full_fan_mode(bool enable) {
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u8 mode_data;
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uniwill_read_ec_ram(0x0751, &mode_data);
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if (enable && !(mode_data & 0x40)) {
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// If not "full fan mode" (i.e. 0x40 bit not set) switch to it (required for old fancontrol)
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return uniwill_write_ec_ram(0x0751, mode_data | 0x40);
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}
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else if (mode_data & 0x40){
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// If "full fan mode" (i.e. 0x40 bit set) turn it off (required for new fancontrol)
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return uniwill_write_ec_ram(0x0751, mode_data & ~0x40);
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}
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return 0;
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}
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static bool fans_initialized = false;
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static int uw_init_fan(void) {
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int i;
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u16 addr_use_custom_fan_table_0 = 0x07c5; // use different tables for both fans (0x0f00-0x0f2f and 0x0f30-0x0f5f respectivly)
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u16 addr_use_custom_fan_table_1 = 0x07c6; // enable 0x0fxx fantables
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u8 offset_use_custom_fan_table_0 = 7;
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u8 offset_use_custom_fan_table_1 = 2;
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u8 value_use_custom_fan_table_0;
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u8 value_use_custom_fan_table_1;
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u16 addr_cpu_custom_fan_table_end_temp = 0x0f00;
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u16 addr_cpu_custom_fan_table_start_temp = 0x0f10;
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u16 addr_cpu_custom_fan_table_fan_speed = 0x0f20;
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u16 addr_gpu_custom_fan_table_end_temp = 0x0f30;
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u16 addr_gpu_custom_fan_table_start_temp = 0x0f40;
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u16 addr_gpu_custom_fan_table_fan_speed = 0x0f50;
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if (!fans_initialized && (has_universal_ec_fan_control() == 1)) {
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set_full_fan_mode(false);
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uniwill_read_ec_ram(addr_use_custom_fan_table_0, &value_use_custom_fan_table_0);
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if (!((value_use_custom_fan_table_0 >> offset_use_custom_fan_table_0) & 1)) {
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uniwill_write_ec_ram_with_retry(addr_use_custom_fan_table_0, value_use_custom_fan_table_0 + (1 << offset_use_custom_fan_table_0), 3);
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}
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_end_temp, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_start_temp, 0x00, 3);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_fan_speed, 0x00, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_end_temp, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_start_temp, 0x00, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_fan_speed, 0x00, 3);
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for (i = 0x1; i <= 0xf; ++i) {
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_end_temp + i, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_start_temp + i, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_cpu_custom_fan_table_fan_speed + i, 0x00, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_end_temp + i, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_start_temp + i, 0xff, 3);
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uniwill_write_ec_ram_with_retry(addr_gpu_custom_fan_table_fan_speed + i, 0x00, 3);
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}
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uniwill_read_ec_ram(addr_use_custom_fan_table_1, &value_use_custom_fan_table_1);
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if (!((value_use_custom_fan_table_1 >> offset_use_custom_fan_table_1) & 1)) {
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uniwill_write_ec_ram_with_retry(addr_use_custom_fan_table_1, value_use_custom_fan_table_1 + (1 << offset_use_custom_fan_table_1), 3);
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}
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}
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fans_initialized = true;
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return 0;
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}
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static u32 uw_set_fan(u32 fan_index, u8 fan_speed)
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{
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u32 i;
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@ -267,30 +347,47 @@ static u32 uw_set_fan(u32 fan_index, u8 fan_speed)
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u16 addr_fan1 = 0x1809;
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u16 addr_for_fan;
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if (fan_index == 0)
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addr_for_fan = addr_fan0;
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else if (fan_index == 1)
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addr_for_fan = addr_fan1;
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else
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return -EINVAL;
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u16 addr_cpu_custom_fan_table_fan_speed = 0x0f20;
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u16 addr_gpu_custom_fan_table_fan_speed = 0x0f50;
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if (has_universal_ec_fan_control() == 1) {
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uw_init_fan();
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if (fan_index == 0)
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addr_for_fan = addr_cpu_custom_fan_table_fan_speed;
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else if (fan_index == 1)
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addr_for_fan = addr_gpu_custom_fan_table_fan_speed;
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else
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return -EINVAL;
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// Check current mode
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uniwill_read_ec_ram(0x0751, &mode_data);
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if (!(mode_data & 0x40)) {
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// If not "full fan mode" (i.e. 0x40 bit set) switch to it (required for fancontrol)
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uniwill_write_ec_ram(0x0751, mode_data | 0x40);
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// Attempt to write both fans as quick as possible before complete ramp-up
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pr_debug("prevent ramp-up start\n");
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for (i = 0; i < 10; ++i) {
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uniwill_write_ec_ram(addr_fan0, fan_speed & 0xff);
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uniwill_write_ec_ram(addr_fan1, fan_speed & 0xff);
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msleep(10);
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}
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pr_debug("prevent ramp-up done\n");
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} else {
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// Otherwise just set the chosen fan
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uniwill_write_ec_ram(addr_for_fan, fan_speed & 0xff);
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}
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else { // old workaround using full fan mode
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if (fan_index == 0)
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addr_for_fan = addr_fan0;
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else if (fan_index == 1)
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addr_for_fan = addr_fan1;
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else
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return -EINVAL;
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// Check current mode
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uniwill_read_ec_ram(0x0751, &mode_data);
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if (!(mode_data & 0x40)) {
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// If not "full fan mode" (i.e. 0x40 bit set) switch to it (required for fancontrol)
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set_full_fan_mode(true);
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// Attempt to write both fans as quick as possible before complete ramp-up
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pr_debug("prevent ramp-up start\n");
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for (i = 0; i < 10; ++i) {
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uniwill_write_ec_ram(addr_fan0, fan_speed & 0xff);
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uniwill_write_ec_ram(addr_fan1, fan_speed & 0xff);
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msleep(10);
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}
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pr_debug("prevent ramp-up done\n");
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} else {
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// Otherwise just set the chosen fan
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uniwill_write_ec_ram(addr_for_fan, fan_speed & 0xff);
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}
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}
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return 0;
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}
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@ -298,10 +395,15 @@ static u32 uw_set_fan(u32 fan_index, u8 fan_speed)
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static u32 uw_set_fan_auto(void)
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{
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u8 mode_data;
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// Get current mode
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uniwill_read_ec_ram(0x0751, &mode_data);
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// Switch off "full fan mode" (i.e. unset 0x40 bit)
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uniwill_write_ec_ram(0x0751, mode_data & 0xbf);
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if (has_universal_ec_fan_control() == 1) {
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}
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else {
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// Get current mode
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uniwill_read_ec_ram(0x0751, &mode_data);
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// Switch off "full fan mode" (i.e. unset 0x40 bit)
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uniwill_write_ec_ram(0x0751, mode_data & 0xbf);
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}
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return 0;
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}
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@ -473,6 +575,26 @@ static long uniwill_ioctl_interface(struct file *file, unsigned int cmd, unsigne
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result = byte_data;
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copy_result = copy_to_user((void *) arg, &result, sizeof(result));
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break;
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case R_UW_FANS_OFF_AVAILABLE:
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result = has_universal_ec_fan_control();
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if (result == 1) {
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result = 0;
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}
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else if (result == 0) {
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result = 1;
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}
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copy_result = copy_to_user((void *) arg, &result, sizeof(result));
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break;
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case R_UW_FANS_MIN_SPEED:
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result = has_universal_ec_fan_control();
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if (result == 1) {
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result = 20;
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}
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else if (result == 0) {
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result = 0;
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}
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copy_result = copy_to_user((void *) arg, &result, sizeof(result));
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break;
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case R_UW_TDP0:
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result = uw_get_tdp(0);
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copy_result = copy_to_user((void *) arg, &result, sizeof(result));
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@ -517,7 +639,6 @@ static long uniwill_ioctl_interface(struct file *file, unsigned int cmd, unsigne
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result = 3;
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copy_result = copy_to_user((void *) arg, &result, sizeof(result));
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break;
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#ifdef DEBUG
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case R_TF_BC:
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copy_result = copy_from_user(&uw_arg, (void *) arg, sizeof(uw_arg));
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@ -80,18 +80,20 @@
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#define R_UW_MODE _IOR(MAGIC_READ_UW, 0x14, int32_t*)
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#define R_UW_MODE_ENABLE _IOR(MAGIC_READ_UW, 0x15, int32_t*)
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#define R_UW_FANS_OFF_AVAILABLE _IOR(MAGIC_READ_UW, 0x16, int32_t*)
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#define R_UW_FANS_MIN_SPEED _IOR(MAGIC_READ_UW, 0x17, int32_t*)
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#define R_UW_TDP0 _IOR(MAGIC_READ_UW, 0x16, int32_t*)
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#define R_UW_TDP1 _IOR(MAGIC_READ_UW, 0x17, int32_t*)
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#define R_UW_TDP2 _IOR(MAGIC_READ_UW, 0x18, int32_t*)
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#define R_UW_TDP0_MIN _IOR(MAGIC_READ_UW, 0x19, int32_t*)
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#define R_UW_TDP1_MIN _IOR(MAGIC_READ_UW, 0x1a, int32_t*)
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#define R_UW_TDP2_MIN _IOR(MAGIC_READ_UW, 0x1b, int32_t*)
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#define R_UW_TDP0_MAX _IOR(MAGIC_READ_UW, 0x1c, int32_t*)
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#define R_UW_TDP1_MAX _IOR(MAGIC_READ_UW, 0x1d, int32_t*)
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#define R_UW_TDP2_MAX _IOR(MAGIC_READ_UW, 0x1e, int32_t*)
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#define R_UW_TDP0 _IOR(MAGIC_READ_UW, 0x18, int32_t*)
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#define R_UW_TDP1 _IOR(MAGIC_READ_UW, 0x19, int32_t*)
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#define R_UW_TDP2 _IOR(MAGIC_READ_UW, 0x1a, int32_t*)
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#define R_UW_TDP0_MIN _IOR(MAGIC_READ_UW, 0x1b, int32_t*)
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#define R_UW_TDP1_MIN _IOR(MAGIC_READ_UW, 0x1c, int32_t*)
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#define R_UW_TDP2_MIN _IOR(MAGIC_READ_UW, 0x1d, int32_t*)
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#define R_UW_TDP0_MAX _IOR(MAGIC_READ_UW, 0x1e, int32_t*)
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#define R_UW_TDP1_MAX _IOR(MAGIC_READ_UW, 0x1f, int32_t*)
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#define R_UW_TDP2_MAX _IOR(MAGIC_READ_UW, 0x20, int32_t*)
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#define R_UW_PROFS_AVAILABLE _IOR(MAGIC_READ_UW, 0x1f, int32_t*)
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#define R_UW_PROFS_AVAILABLE _IOR(MAGIC_READ_UW, 0x21, int32_t*)
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// Write
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#define W_UW_FANSPEED _IOW(MAGIC_WRITE_UW, 0x10, int32_t*)
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@ -37,6 +37,7 @@
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typedef u32 (uniwill_read_ec_ram_t)(u16, u8*);
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typedef u32 (uniwill_write_ec_ram_t)(u16, u8);
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typedef u32 (uniwill_write_ec_ram_with_retry_t)(u16, u8, int);
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typedef void (uniwill_event_callb_t)(u32);
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struct uniwill_interface_t {
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@ -73,6 +74,7 @@ u32 uniwill_add_interface(struct uniwill_interface_t *new_interface);
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u32 uniwill_remove_interface(struct uniwill_interface_t *interface);
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uniwill_read_ec_ram_t uniwill_read_ec_ram;
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uniwill_write_ec_ram_t uniwill_write_ec_ram;
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uniwill_write_ec_ram_with_retry_t uniwill_write_ec_ram_with_retry;
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u32 uniwill_get_active_interface_id(char **id_str);
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struct uniwill_device_features_t *uniwill_get_device_features(void);
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@ -126,6 +126,32 @@ u32 uniwill_write_ec_ram(u16 address, u8 data)
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}
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EXPORT_SYMBOL(uniwill_write_ec_ram);
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u32 uniwill_write_ec_ram_with_retry(u16 address, u8 data, int retries)
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{
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u32 status;
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int i;
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u8 control_data;
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for (i = 0; i < retries; ++i) {
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status = uniwill_write_ec_ram(address, data);
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if (status != 0) {
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msleep(50);
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continue;
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}
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else {
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status = uniwill_read_ec_ram(address, &control_data);
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if (status != 0 || data != control_data) {
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msleep(50);
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continue;
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}
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break;
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}
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}
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return status;
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}
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EXPORT_SYMBOL(uniwill_write_ec_ram_with_retry);
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static DEFINE_MUTEX(uniwill_interface_modification_lock);
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u32 uniwill_add_interface(struct uniwill_interface_t *interface)
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